Aliaksei Chapyzhenka

Currently we have a single file `rv_zicbo` wich does not correspond to a specific extension group. https://github.com/riscv/riscv-opcodes/blob/0a858fa5caf20addafc9472ad3ec7489fe5f6b9b/rv_zicbo#L1 Should it be split into 3 files: `zicbom`, `zicboz`, `zicbop` ?

Chebyshev Type II support

1

Thank you for the awesome package. It would be great if it could design Type II Chebyshev filters (inverse Chebyshev filters) https://en.wikipedia.org/wiki/Chebyshev_filter#Type_II_Chebyshev_filters_(inverse_Chebyshev_filters)

Out of date with Shift-Spec.

5

Package is out-dated because Shift-spec if moved forward? Any plans to make it up-to-date?

Have you considered using CORDIC

13

Hi @jamesbowman nice little library. Good algorithm when you are running on CPU / FPGA with fast HW multiplier. As for Verilog implementation, have you considered using [CORDIC](https://en.wikipedia.org/wiki/CORDIC) algorithm. To...

https://github.com/chentsulin/awesome-react-renderer https://github.com/iamdustan/tiny-react-renderer https://github.com/facebook/react/blob/master/src/renderers/noop/ReactNoop.js

when converting object into string check for availability of `toString` method, and call it to get the portion.

Ideas is to use GitHub CSS classes to style SVG diagrams. GitHub allows inserting SVG files with `` tag: ```  ``` 

Multiplexer (mux)

1

multiplexer (or mux) is a device that selects one of several input signals and forwards the selected input into a single line. Proposed **mux** expression (selector in position 1): ```...

:construction: Work In Progress :construction: wire types: https://github.com/sifive/duh-bus/blob/master/docs/types.md ## wire drawing The distinct visual language behind wire types. Single wire in digital design can be modeled as a directed forward...