Moritz Schneider

Yes, we have looked at the arty board but it would indeed nearly use up all the space on there. However, we recently discovered another board that might be a...

There is a size limit that the current setup supports. I believe it's about 32mb. So if your image is more than that, you might see some weird errors. Edit:...

If you read the line carefully it performs a bitwise AND (`&`). This means in your scenario what is actually happening is this: ``` 2'b11 AND 2'b00 =? 2'b00 ```...

This is just a guess, but I believe Chipyard uses the write-through L1 cache variant of CVA6 (https://github.com/ucb-bar/cva6-wrapper/blob/139741a584d7e3c0446db592b5d99529bd6cf9fa/src/main/resources/vsrc/Makefile#L132). That explains why the performance depends on the L2 cache.

As far as I understand you want to run something bare-metal on the FPGA. First of all, you have to tell your compiler/linker to not use any underlying library such...

For a quick fix, you can just remove the `override` keyword in the line mentioned in the error message.

Hi @spidugu444, I do not understand the issues that you observe. Why should PMPCFG[0-1] not read the value that were written? I also do not get the locked issue. Could...

This issue is fixed and can be closed

The FORMAL ifdef surrounds any kind of assert that was at some point checked by a formal model checker. I am not sure if verilator even compiles with FORMAL defined....

A small observation: The log of the gpt partition header clearly indicates that the SD card is not correctly set up. The partition table just reads all 0s. Did you...