Michael Jørgensen
Michael Jørgensen
> Just curious. When loading a `.PRG` file, how does the C64 Core know where in memory the binary contents of a file should be loaded? Is it always the...
Should be fixed in V5.2A2
@dansanderson @paich64 @sy2002 @SensoriumEmbedded @Kugelblitz360 Here is a screenshot from the FPGA's built-in logic analyzer (ILA):  The numbers at the top are core clock cycles @...
> @MJoergen I checked the commit and delaying the PHI2 output is indeed a "dangerous" change as it changes absolutely everything we do on this hardware port. On the other...
> Does the timing change positively affect the skoe Kernal replacement trick? [https://skoe.de/kernal/[kernal-cartridge.pdf](https://skoe.de/kernal/kernal-cartridge.pdf)](https://skoe.de/kernal/%5Bkernal-cartridge.pdf%5D(https://skoe.de/kernal/kernal-cartridge.pdf)) It's quite likely to have an impact. I would need to study this document in detail, so...