Michael Jørgensen

Hmm. I just tried right now: 1. Clone repository 2. type `make` and that worked fine. I'm running Linux Mint (variant of Ubuntu). I guess you're on a Windows machine....

Interesting proposal. Thank you for writing. I suppose one could add a generic to configure the width of the Avalon data bus. However, I generally prefer to Keep Things Simple...

I've found the following documentation of m65dbg: https://github.com/MEGA65/mega65-core/blob/development/docs/usermanual0.md#43-remote-serial-monitor-handy-for-debugging https://github.com/MEGA65/mega65-core/blob/development/docs/monitor.md

Part 1 is now implemented in commit e21f3e5. The feature is default disabled and uses no extra resources in this configuration. To enable the UART, set the constant ENABLE_UART to...

We might also want to include additional functions, e.g. square root. This can be done in around 7 clock cycles too. See this link for an implementation of the square...

Here is an implementation of the division algorithm: https://github.com/MJoergen/nexys4ddr/blob/master/offloader/Episodes/ep10_-_Fact/math/divmod.vhd Note, all these optimized algorithms are expected to run at a much faster clock rate (> 200 MHz). This is possible...

Interesting alternative. I had indeed forgotten about that "busy" status :-) However, I still prefer the `CPU_WAIT_FOR_DATA` approach. My reasoning is as follows: The "check for busy" code in `math_library.asm`...

What kind of interface (with the QNICE) should we agree on? I'm thinking about reserving a page in sys_info, where basically the entire register map of the RTC is mirrored....

Interestingly, the monitor I have connected to my MEGA65 is a Dell U2412M. According to the User's Manual, it supports a HSYNC frequence between 30 kHz and 83 kHz. However,...

A step in this direction has been done in commit 4c3a6e3