AngelaGonzalezMarino

Mmu unify pr

2

Unification of MMU sv32, sv39 and sv39x4

### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description Hi @Saute0212 @JeanRochCoulon I guess an issue is more...

Mmu user manual

2

Update of user manual related to MMU Unification

Mmu design document

4

Update of design document related to MMU Unification

fix tval in mmu

4

Use vaddr for tval instead of paddr when translation is enabled

Invalid pte reserved

2

Add reserved bits to PTE structure be used in sv39 and sv39x4 only Check that they are 0, otherwise the PTE is considered invalid

Add the condition for updating the tlb only after a miss is incurred

2

Including PR https://github.com/openhwgroup/cva6/pull/1807

allow respond to read transactions between address write and data write to speed up response

1

Current implementation goes to wait valid state after receiving an address write, until the data write comes The proposal is to permit to respond to read requests that may come...