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Low level access to Cortex-M processors

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Rather than busy-wait the CPU, the delay implementation should set the systick to generate an interrupt on overflow, and sleep with a `wfi`. This would reduce power consumption. You might...

enhancement

Fixes #499 Fixed `VectActive::from(u8)` now returns correct value for Interrupt variant Refactored `SCB::vect_active()` to use `VectActive::from(u8)` and get rid of code duplication

In the nightly reference for inline assembly it says for `nomem` that: "The compiler also assumes that this asm! block does not perform any kind of synchronization with other threads,...

I discovered this bug accidentally while working with SCB and exceptions. `cortex_m::peripheral::scb::VectActive::from()` function returns incorrect value, which is 16 higher than the expected value. (in case when `VectActive` is `VectActive::Interrupt`....

In the `cortex-m-rt` docs, the [extra sections example](https://docs.rs/cortex-m-rt/latest/cortex_m_rt/#extra-sections) shows the definition of a zero-initialized static mut array in a section outside of RAM. I believe this to be unsound, and...

I-unsound

Since #241 we've had an `InterruptNumber` trait in `cortex-m`, which is intended to be used by PACs to mark their enum of interrupts in a way that cortex-m's NVIC driver...

In general, the definitions for a lot of the registers defined in `SCB`, `SAU`, etc., are rather deficient, but my current complaint is the Fault Status registers. The ones defined...

enhancement

Every project using `cortex-m-rt` gets these linker warnings. I don't know what could cause them, it might be good to investigate if we can get rid of them. Normally they're...

Hi guys, I am relatively new to working with the cortex-m crate. I am working on debugging a spi slave implementation and would like to check whether or not my...

It would be great to have a "lite" version of the macros in `cortex-m-rt` which are written without proc-macro and related dependencies. For smaller applications which do not have a...

enhancement