cortex-m
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rust-embedded
Low level access to Cortex-M processors
## Summary `#[late]` static are statics that are initialized at runtime, before the entry point is called and after RAM initialization happens. ## Motivation Consider the allocator example from the...
As far as I could tell the API does not currently allow setting the exception return value (`EXC_RETURN`) in exception handlers, which would be useful for implementing context switching etc....
In `2018` edition instead of `extern crate cortex_m_rt as rt` one would use Cargo `rename-dependency`: ``` [dependencies] rt = {version = "0.6.2", package='cortex-m-rt'} ``` cortex_m_rt_macros, however, doesn't respect this and...
This may be getting a bit too complex to call "minimal", but to support applications that require some permanent storage there needs to be a section defined for that. This...
I was looking into the default handler implementation and found some (seemingly) low-hanging fruit. I wanted to get your opinion before I made any changes though. 1. I think the...
I have an interrupt handler which is called very frequently and due to the CPU running at high speed I have to use wait states which seems to slow down...
I am currently unable to run my application standalone when a debugger is not present. I am suspecting that it is because the TPIU and the ITM port are not...
`NVIC::enable()` was deprecated with the following warning. > WARNING This method is a soundness hole in the API; it should actually be an unsafe function. Use NVIC::unmask which has the...
Currently, the `cortex_m::interrupt::free` mechanism, for executing a closure without the interference of interrupts, brackets the closure with `cpsid` and (conditionally, to support nesting) `cpsie` instructions. These instructions do nothing in...
I propose something akin to: ```rust itm.configure(ITMConfiguration { // ... stim: Stimulus::EnableAll } ``` ```rust itm.configure(ITMConfiguration { // ... stim: Stimulus::EnableSome([0..5, 8..31]), } ``` Better review `iprint` and `iprintln` and...
