Rachit Nigam

Thanks! (1) seems like a bug in lowering while (2) is probably in the backend. For (2), we basically attempt to generate the string name of the operator based on...

Yeah, this sounds like a fun idea! Basically, we'd be implementing a array-of-struct to struct-of-array transformation. From the language semantics perspective, it enables parallel access to different fields at different...

Hm, the website publishing flow is currently broken. Could you open an issue about it? I think we'll need to host it using Github pages. We might as well use...

Awesome stuff @calebmkim! I think once we merge this, it would be cool to do a synthesis study using the benchmarks we've collected to see what the effect of various...

Sounds like a good idea to me! Also, do you mind adding relevant labels to the issue ("calyx-py", "need triage / available")

Fixes #1423

Good point! The alternative is generating `casex` statements which might not have the best support in the simulators we use but should otherwise support the optimization and generation of non-priority...

Thanks for opening this @ayakayorihiro! Could you add the "Tracker" label to this issue?

I would remove the requirement that the parameters need to be the same and just focus on the names and bitwidths of ports.

Hey @matth2k! Thanks for opening the PR. @andrewb1999 is right: we don't want this in `compile.futil` since that is packaged into every Calyx file for compilation. I would recommend adding...