Vyacheslav Klochkov
Vyacheslav Klochkov
Signed-off-by: Vyacheslav N Klochkov
The optimization is turned on for non-ESIMD path even with -O0. It also work-arounds the SegFault on host when specialization constants are set on host, but not used on device....
With the new esimd::block_load(usm, ...) and esimd::block_store(usm, ...) functions that are lowered to LLVM IR and efficiently lowered/split into proper size chunks in IGC BE, we can simply use them.
SPIR targets require SPV_KHR_bit_instructions and SPV_INTEL_arbitrary_precision_integers extensions to translate llvm.bitreverse with non-standard width and this combination is not yet supported by SPV translator and/or device back-ends.