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Published 20 hours ago • verified publisher icon intel

[SYCL][ESIMD] Disable bitreverse recognition for non-std width

Open v-klochkov opened this issue 10 months ago • 1 comments

SPIR targets require SPV_KHR_bit_instructions and SPV_INTEL_arbitrary_precision_integers extensions to translate llvm.bitreverse with non-standard width and this combination is not yet supported by SPV translator and/or device back-ends.

v-klochkov avatar May 02 '24 06:05 v-klochkov

I would propose to add LIT test that checks one of LLVM Transformation passes.

maksimsab avatar May 03 '24 13:05 maksimsab

I'm taking over this work so I'll close the PR and resubmit a new one with a few changes.

sarnex avatar May 16 '24 14:05 sarnex