xilinx-vivado topic

This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.

pontazaricardo

Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface

Wissance

Repository to store all design and testbench files for Senior Design

Crimsonninja

experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.

hdlguy

"100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado

ekb0412

SPI ELF bootloader for Xilinx Microblaze processors

henrikbrixandersen