xilinx-vivado topic

Repurposing existing HDL tools to help writing better code

suoto

Bus bridges and other odds and ends

ZipCPU

This repository contains source code for past labs and projects involving FPGA and Verilog based designs

nxbyte

Xilinx Virtual Cable Server for Raspberry Pi

derekmulcahy

USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)

ultraembedded

Extremely basic CortexM0 SoC based on ARM DesignStart Eval

siorpaes

中国科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session

sailordiary

Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.

Domipheus

This repository contains all labs done as a part of the Embedded Logic and Design course.

sarthak268

Bazel rules for Xilinx Vivado

agoessling