Verilog topic
Verilog is a widely-used hardware description language (HDL) that enables designers to model, simulate, and synthesize digital circuits. It provides a text-based format for specifying the structure and behavior of electronic systems, making it easier to design complex hardware components such as microprocessors, memory, and communication devices.
NyuziProcessor
GPGPU microprocessor architecture
darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
FPGA
帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
verilator
Verilator open-source SystemVerilog simulator and lint system
icestudio
:snowflake: Visual editor for open FPGA boards
clash-compiler
Haskell to VHDL/Verilog/SystemVerilog compiler
cocotb
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
hdl
HDL libraries and projects
platformio-vscode-ide
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT