picorv32 topic

Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

efabless

Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.

efabless

Physical Design Flow from RTL to GDS using Opensource tools.

akilm

A 32-bit RISC-V SoC on FPGA that supports RT-Thread.

wuhanstudio

This project aims at implementing an hardware accelerator peripheral for SHA256 hashing algorithm with AXI4 interfacing with PicoRV32 CPU. The project focuses on multiple implementations of the accele...

antonson-j1