Marek Materzok
Marek Materzok
There is a need to move stuff around to make things more intuitive for newcomers (and others). Some problems in directory organization are: * The `coreblocks/params` directory is a mess....
This PR is (Yet Another) experiment in making tests simpler to write. The testing mechanism introduced here runs settles when needed, so that a test writer never needs to write...
Suppose we have a code like this: ```python @def_method(m, method1): def _(): method3(m) @def_method(m, method2): def _(): method3(m) with Transaction().body(m): with m.If(foo): method1(m) with m.Else(): method2(m) ``` Currently, an exception...
The task is to extend the multiplication support from #114 by a pipelined multiplier. The module should: * Be able to use the multiply-and-add capability of FPGA DSP elements (with...
The CSRs in question are: * [ ] `misa` * [x] `mvendorid` * [x] `marchid` * [x] `mimpid` * [x] `mhartid` * [ ] `mstatus` and `mstatush` * [x] `mtvec`...
As one picture is supposedly worth a thousand words:  The task is to investigate and make sure this doesn't happen again.
Some time ago, we made the decision to not use the physical register 0, so that the 0 can be used for two things: * mark that an operand is...
This PR utilizes `def_helper` mechanisms to create a nicer API for using transformers. Following changes in interpreting the function arguments of the transformer classes are made: * The module parameter...
We need to implement floating point operations in order to support interesting applications. It probably isn't worth it to implement IEEE 754 in Amaranth, so the best course of action...
There is a very nice set of formal tests for the RISC-V architecture ([riscv-formal](https://github.com/SymbioticEDA/riscv-formal/blob/master/docs/rvfi.md)). To use it, the processor should have a RVFI interface, which presents the currently retired instructions...