QNICE-FPGA
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sy2002
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
This issue consits of two tasks: 1. Explain the "Monitor-OS" as such and how to use it 2. Write documentation about how to make and publish new OS functions (Monitor...
**IMPORTANT**: As of time of writing, this only works on **branch** `dev-vbcc-vasm-fix` VBCC supports ISRs: Test the ISR feature and write a timer interrupt/ISR test for VBCC and put it...
One of the basic ideas of QNICE-FPGA is, that it is meant to be highly portable. For sure we are not there, yet ;-) Currently, everything is quite Xilinx specific....
Access shadow registers Context https://github.com/sy2002/QNICE-FPGA/issues/127#issuecomment-695751401
First of all, the following decision has to be made: 1. Shall the X flag act as Bernd described it here: https://github.com/sy2002/QNICE-FPGA/issues/160#issuecomment-707624518 2. Or shall the X-flag act as Michael...
Make MEGA65 work again with Vivado and ISE: Compared to V1.6, the current develop V1.7 sports a plethora of changes and new features. This issue is about making all this...
If one of the Math PhDs @bernd-ulmann and @MJoergen would like to do me a favor, then you could implement these `SHL32` and `SHR32` stubs in `monitor/math_library.asm` (and maybe even...
When I use a freshly programmed FPGA (fresh HyperRAM controller), and then read the control registers, the value of the first read at the first control register is wrong: ```...
Using `test_programs/MEGA65/hyperram.asm`. What it does: Start at address 0x00333333 and fill 1MB of data with 16-bit values starting from 0x0000 and then count them up by one at every address,...
This issue is just a placeholder for the job of porting to a new platform.
