QNICE-FPGA
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sy2002
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
The Nexys 4 DDR seems to have a Xilinx XC7A100T-1CSG324C with a -1 speed grade. Currently ISE and Vivado are configured for -3. Setting it to -1 currently does not...
The recently added feature of fractional pixel scaling lead me to wish for a higher resolution VGA output. My first thought was whether our VHDL implementation can support such a...
This issue is about enabling fractional scaling of the display. The idea is to allow easy implementation of almost-3D games like Wolfenstein or to make smooth 3D text scrolling like...
* Add to the Monitor OS a `delay` function that takes a 32bit value in R8/R9 and that then uses the cycle counter to syncroneously wait the given amount of...
# Marketing Goals V1.7 will be such an awesome release that it is now time to proactively market this project to create a larger community. ## Prerequisites The prerequisites in...
This issue steps from this comment: https://github.com/sy2002/QNICE-FPGA/issues/179#issuecomment-719987345 Given a C program like this: ``` int a; void f() { if (a < 2) { a=2; } } int main() {...
@MJoergen **YOU ROCK** 🤟 🚀 🥳 🧨 🎆 I truly love your maze game. It is great that you merged it into `dev-vbcc-vasm-fix` because that enables us to release it...
Possibly a challenge in the backend (`c/qnice/compiler-backend/machine.c`). Volker said that it is not trivial. I am creating this issue, so that we are not forgetting about it. Right now, we...
In the meantime, thanks to the font gfx and sprites - and also the timer - we have so much interessting (and complex) example code to test, that an ability...
Make all operating system functions that are working with hardware registers ISR-safe. For context, read https://github.com/sy2002/QNICE-FPGA/issues/109#issuecomment-693892892. ``` isr_mulu isr_muls isr_divu isr_div isr_vga_copyfont ... and more ... ``` **Make sure that...