Investigate the speed grade issue and make sure timing closes on the Nexys 4 DDR

[sy2002]

The Nexys 4 DDR seems to have a Xilinx XC7A100T-1CSG324C with a -1 speed grade.

Currently ISE and Vivado are configured for -3.

Setting it to -1 currently does not close timing.

[MJoergen]

I tried with speed grade -1 using Vivado to build for the Nexys4DDR board, and it closes timing without problem.

I've therefore updated to grade -1, and closing this issue.

[sy2002]

assigning to me and note to self: document "the strange dashboard behavior" here and then assign to MJoergen