Schuyler Eldridge

I agree I suspect this is something in the Chisel or Chisel/firtool interaction as we do run all CIRCT tests on Windows.

So there are a number of ways to handle this: (1) include the bind files in the compilation, (2) use `--enable-layers=Verification,Verification.Assert,Verification.Assume,Verification.Cover` to cause CIRCT to specialize these layers (which effectively...

Also, I should clarify that this change is _coming from Chisel_, specifically this: https://github.com/chipsalliance/chisel/commit/42f8a046ba199edc8ca651d044c1df170836d570 Nothing has changed with CIRCT/firtool regarding these statements.

For (1) and (2), are you _sure_ that the FIRRTL being produced is incorrect? Those tests are written as `forAll` which I think is sweeping over different parameters and possibly...

I thought about making this change, too. I went another direction with ChiselSim, though, which was to have it look for files that are layer enable files and include the...

There's no option to get the output that you're looking for. I agree that what you want is the desired output. This is doable to fix, but a bit tricky....

For registers, this should do what you want. I.e., `r` should only be updated to `v` when `w` is a `Some`. (Maybe I'm misunderstanding.) That example should simulate the same...

I agree that this seems like the kind of thing that should be disallowed. The description of a combinational loop should be updated to include language that specifically states that...

It seems like the same kind of problem. One thing I will note is that we've been discussing adding a notion of "domains" to FIRRTL which should subsume a lot...

Good point @tymcauley. This is the kind of thing that I worry about. Even for combinational cycle detection, you can't express an inverter chain which is an entirely sane test...