podgori

**Update:** - Created the following branch: https://github.com/analogdevicesinc/linux/tree/axi_tdd - Removed 'NG' from the IP name and driver since the new IP will be named: _axi_tdd_ - Tested in hardware on a...

The changes look good. As an improvement, I suggest adding 2 new debug registers, useful for addresses which are greater than 32 bits, which return the higher part of the...

v1.1: Minor update in axi_tdd_channel.sv to change the reset value of ch_pol to DEFAULT_POLARITY.

**V2** - Removed _tdd_active_ output - Replaced .xdc constraints file with .ttcl constraint generating file - Fixed ch_pol to reset to DEFAULT_POLARITY - Renamed CDC sync flops for ext sync...

v2.1: Added the TDD regmap files.

v2.2: Integrated the new TDD engine in the ad9081_fmca_ebz_x_band project.

v2.3: Updated the scripts to create a wrapper around the TDD core and generated channel slices.

**Update:** The HDL code has been merged into master.

**Update:** The driver development has been moved to: https://github.com/analogdevicesinc/linux/tree/dev_phaser