Matt Liberty
Matt Liberty
Yes we check for missing gds. In ng45 see export GDS_ALLOW_EMPTY = fakeram.*
1 - Quite likely due to the selection of gates during techmapping in yosys/abc. Possibly due to limited gate sizes in the library. We'll have to look at the paths...
3 - yes those are the regular clock buffer cells in -buf_list
How will this work with secure CI? (@vvbandeira )
I think abc should match whatever yosys is using as they are tested together.
@louiic is the expert on this so I hope he will comment. LEF does not give you a track pattern directly.
I recall now that in asap7 the row height is 7.5 M2 tracks. So if you used the pitch you would get irregular track patterns. If you look at the...
The LEF has some syntax to express a track pattern (OFFSET and PITCH). However in asap7 that is insufficient due to the above issue and so we have to manually...
I suspect there are more corner cases that @louiic could comment on. However making something that can automate the known PDKs would be nice.
The direction is to move towards replacing ORFS with OL. Do you have a need for this in ORFS or it more of a general note? If the later I...