Matt Liberty

The main working examples we have are in proprietary PDKs. The skywater pads are poorly documented and its been hard to set one up with confidence. It might be better...

This was created as a work in progress to make a public example. Unfortunately it never got completed before the original author left the project. I've left it around on...

Is it possible to provide a test case?

Does this make sense: ``` [WARNING RSZ-0069] skipping net u_core/u_icache/data_addr_r[0] with 103883 pins. ``` Is that single bit really a global signal?

Something is quite wrong in 3_4_resizer.log ``` ========================================================================== resizer report_wns -------------------------------------------------------------------------- wns -164492.39 ... resizer report_check_types -max_slew -max_cap -max_fanout -violators -------------------------------------------------------------------------- max slew Pin Limit Slew Slack ------------------------------------------------------------ u_core/u_icache/_0848_/Y 320.00...

The 3_4 issue comes back to the warning above. Such a large net produces terrible runtimes in building a Steiner tree and so we skip it. Please provide more detail...

It looks like you have rams that you are synthesizing at gate level (eg icache_data_ram). You should use a RAM macro for those.

@ravi-varadarajan it looks like you created this design. Do you have the missing files? If not I'll remove it.

This has failing CI and has merge conflicts. I see that the OR PR is merged - is this still needed?

Please try with ```./build_openroad.sh --local --latest```