coreblocks
coreblocks copied to clipboard
kuznia-rdzeni
RISC-V out-of-order core for education and research purposes
This PR adds the `misa`, `mvendorid`, `marchid`, `mimpid`, `mhartid`, `mscratch` and `mconfigptr`, bringing the completion of #561 a little bit closer. Other than `mscratch`, all of the other added CSRs...
This PR moves the Amaranth stubs and types to a separate package. A submodule is used for easier development. This change prepares for separating Transactron.
Few times we had already a problem, where we would like to select something from the circular buffer. I have hit this once more in RS LSU and accidentally I...
This PR makes the `precommit` method in ROB runnable only if the `rob_id` from its argument matches. This allows to eliminate `m.If` expressions comparing `rob_id`s in FUs. What do you...
While working on #699 I found that increasing the size of the instruction buffer causes performance loss on a benchmark. Here's what happened. Increased size of the instruction buffer caused...
Here is a small refactor of the LSURequester it now support the request pipelining thanks to using the fifo. Additionally unit tests has to be updated, because after that change...
This PR removes the conflicts on the `clear` method from `Pipe` and `Forwarder`. The conflicts are known to reduce performance. It should be noted that the `read` methods would still...
Using `MultiPriorityEncoder` from #573, one could implement a clean free RF list with superscalarity support. If I see correctly, this is already implemented in #395. (Everything is already implemented there,...
Xiangshan realizes its ROB flushing in a single cycle by rolling back pointers in the ROB and Free-RF-FIFO and we should do the same. Taken from the discussion in #254:...
Metadata
Owner
Metadata
RISC-V out-of-order core for education and research purposes