eda-scripts

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= Collect of various scripts for working with EDA-tools (ASIC, FPGA, etc) Dmitry Murzinov [email protected] v1.0, 6.7.2016 :doctype: article :lang: en :stem: :grid: all :align: center :imagesdir: image :homepage: http://idoka.ru // added 12.07.2023: :idprefix: :idseparator: - ifndef::env-github[:icons: font] ifdef::env-github[] :note-caption: :paperclip: :tip-caption: :bulb: endif::[]

image:https://img.shields.io/badge/-Vivado-FF1010.svg?logo=xilinx&logoColor=ffffff[vivado] image:https://img.shields.io/badge/-Quartus-blue.svg?logo=intel&logoColor=ffffff[quartus]

== Intro

I hope that helps not only me

NOTE: Russian description available here: http://idoka.ru/my-fpga-and-asic-scripts/

== Script collection

=== UCF2XDC converter

image:https://img.shields.io/badge/-Vivado-FF1010.svg?logo=xilinx&logoColor=ffffff[vivado] The ucf-to-xdc.sh script for Xilinx EDA-tools: that convert ISE-style to Vivado-style constraints (sdc -> xdc)

Detailed description: include::ucf-to-xdc.adoc[leveloffset=+2]

=== Vivado usage runtime statistic

image:https://img.shields.io/badge/-Vivado-FF1010.svg?logo=xilinx&logoColor=ffffff[vivado] The vivado-stat.sh script for Xilinx Vivado-tool: that prints CPU and Memory usage of all instances of Vivado tools

Detailed description: include::vivado-stat.adoc[leveloffset=+2]

=== Fake NIC create

The fake-nic.sh script for creating the (additional) HostID if your laptop don't have any wired Ethernet Adapter or many other cases :)

Detailed description: include::fake-nic.adoc[leveloffset=+2]

TIP: By the way Latest version of FLEXLM and SCL supports multiple HostID at same time, i.e. all eth* (not only eth0)

=== Build-in revision number into FPGA-image

The vergen-fpga.sh script make imprinting build date and FW-hashsum intro FW-image

Detailed description: include::vergen-fpga.adoc[leveloffset=+2]

=== Initial git settings of new EDA-related repository

The git-setting.sh script create empty repo in specifyed location and set up required setting for EDA-related projects (at the first one: the proper .gitattributes and .gitignore files)

Detailed description: include::git-setting.adoc[leveloffset=+2]

=== Find proper parameters for getting desired Frequency value by PLL/DCM block of Xilinx FPGA

The xilinx-pll-calc.php script print table of proper parameters for desired output frequency (based on known input frequency)

Detailed description: include::xilinx-pll-calc.adoc[leveloffset=+2]

== License

This project is licensed under the MIT License - see the link:LICENSE[] file for details

== References

• link:scratch.adoc[Notes]

////

• http://www.redhat.com/[RedHat]
• http://www.centos.org/[CentOS]
• http://www.xilinx.com/[Xilinx]
• http://www.altera.com/[Altera] ////

Feel free to send me comments, suggestions and bug reports