Flavien Solt

Hi there! I've detected a bug in CVA6, probably in CVFPU but I'm not certain. I initially posted the issue [in the CVA6 repo](https://github.com/openhwgroup/cva6/issues/1091) before moving it here. I used...

Hi there! I've detected a bug in CVFPU. ## Brief bug description A conversion from double to unsigned int `fcvt.wu.d` provides wrong results in some cases. I discovered the bug...

Hi there! I've detected a bug in CVFPU. ## Brief bug description A conversion of +inf from double to simple sets a lot of bits in the mantissa, unexpectedly. I...

Hi there! In complement to #7 , I noticed that reading existing CSRs also causes the CPU to hang. This happens only if the destination register is distinct from `zero`....

Hi there! This PR fixes #8. Thanks! Flavien

Hi there! ### Bug description I think I found a bug not described in the issues and PRs in this repo. `minstret` seems to overcount. ### Example snippet The stored...

Hi there! I've detected a bug in Kronos, which complements #7 . ## Brief bug description Writing non-existent CSR does not raise an illegal instruction exception. The RISC-V specification says:...

Hi there! I've detected a bug in Kronos. ## Brief bug description Accessing non-existent CSR does not raise an illegal instruction, but instead hangs after a couple of instructions later....

Bug report: stale register value in case of double write

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Hi there! I found a bug in Kronos that in some cases ignores the second consecutive write to a given register in case of a WAW dependency. A problematic example...

Hi! This is a draft proposal for fixing #5 . Thanks! Flavien