f4pga-arch-defs
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f4pga
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Pull Request created by the conda lock update workflow.
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Bumps [third_party/ibex](https://github.com/lowRISC/ibex) from `f30e84b` to `7e9eef2`. Commits 7e9eef2 [cosim] Pass PMP configuration through to spike 8282a0d [rtl] Fix MaxOutstandingDSideAccessesCorrect assertion 4acc27b [rtl, icache] Rework invalidation logic f2c09fe [ci] Move to...
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Bumps [third_party/litex](https://github.com/enjoy-digital/litex) from `95b310e` to `33ae301`. Commits 33ae301 Merge pull request #1395 from lschuermann/dev/missing-cpus-manifest 727cc40 Add missing soc/cores/cpu directories to MANIFEST.in 552d7bd cpu/NaxRiscv: update ec4c874 cpu/NaxRiscv: update c4e635e Merge pull...
Blocked by https://github.com/chipsalliance/f4pga/pull/581.
Based on #2845 and blocked by https://github.com/chipsalliance/f4pga/pull/607.
Blocked by https://github.com/chipsalliance/f4pga/pull/604.