Lee Moore
Lee Moore
Hi All, I have a requirement for a faster retune in synchronous, direct sampling mode - which involves 1. change of frequency 2. change of sample rate I am looking...
@silabs-hfegran @silabs-mateilga I am currently looking at the transition to using ImperasDV, and I wanted to get a baseline set of results. I checked out the CV32E40X/dev branch, and when...
@JeanRochCoulon I saw a new tool has been created called vptool. I followed the instructions in VPTOOL-readme.txt for installation of packages, then whent to the vptool-example directory trying to run...
Can I ask, for the test above cv32e40p_csr_access_test - does this test also ensure that CSR Registers which should NOT exist, raise an appropriate illegal instruction exception ? so as...
**Component:Doc **: The documentation seems to use the same expression to determine a load or store error data_err_i = 1 and data_rvalid_i = 1 for load data_err_i = 1 and...
In the Documentation Changes from 0.2.0 to 0.3.0, it says > Fixed mpie R/W attribute by @Silabs-ArjanB in #481 I cannot find any differences in the pdf documentation between 0.2.0...
In the Documentation Changes from 0.2.0 to 0.3.0, it says > Updated WARL behavior of pmpxcfg by @Silabs-ArjanB in #491 I cannot find any differences in the pdf documentation between...
In the Documentation Changes from 0.3.0 to 0.4.0, it says > Added fence.i related notes. Added mstateen CSRs (applicable to CV32E… by @Silabs-ArjanB in https://github.com/openhwgroup/cv32e40x/pull/524 I cannot find any differences...
In the Documentation Changes from 0.3.0 to 0.4.0, it says > Made mcounteren WARL 0x0 by @Silabs-ArjanB in #525 I cannot find any differences in the pdf documentation between 0.3.0...
In the Documentation Changes from 0.3.0 to 0.4.0, it says > Corrected RW into WARL for mseccfg.RLB, mseccfg.MMWP, mseccfg.MML, pm… by @Silabs-ArjanB in #529 I cannot find any differences in...