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[TASK] Add a test for misaligned branches

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### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Issue #1300 should be fixed by PR #1719. There...

Draft: User config

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> :warning: This PR is not ready for merge yet. It builds CVA6 with embedded configuration on Verilator and runs CoreMark but there are still formatting + history cleanup +...

Rework syscalls.c once system prints are implemented

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[#1857](https://github.com/openhwgroup/core-v-verif/pull/1857/files#diff-62f67c1d16e0eb8da38c8838b66b69e31890c555b9d2ad5509d245754da1f25d) introduced two new functions: https://github.com/openhwgroup/core-v-verif/blob/1eac965d073abc18ab6aff5e6f62fd635b060746/cva6/tests/custom/common/syscalls.c#L78-L81 and https://github.com/openhwgroup/core-v-verif/blob/1eac965d073abc18ab6aff5e6f62fd635b060746/cva6/tests/custom/common/syscalls.c#L164-L173 We might want to move or modify them once system prints is made via UART both in Spike and CVA6. (Related: openhwgroup/cva6#1421)

Reading mcycle CSR makes simulation fail

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This issue is about CVA6 end of test. * Functionally incorrect behavior * Confusing or extraneous status or error messages Using `setStats()` in a program enables a counter. After `main()`...

[TASK] Prepare documentation of multiple CVA6 variants

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### Task Description #1691 plans to document several variants of the CVA6. This is a big piece of work. To make this work easier, some preparation is needed first: -...

[BUG] no Spike configuration to disable S-mode [compliance, csr and tests-p failing on master]

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### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description `master` branch has 3 failing tests since 4b67475fa452e9d363a22f9c47280fe54c4e780b: -...

[TASK] investigate possible FPGA build time optimizations

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### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description https://github.com/openhwgroup/cva6/pull/1535 reduced the number of jobs run for each...

There are several issues building spike in CVA6 CI: 1. The `yaml-cpp` target added by Valentin outputs `.h` files so it must be run before compiling `riscv` which directly depends...

[TASK] Fix regression tests

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### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Make dashboard green for `master` branch. ### Required Changes...

Make OPERANDS_PER_INSTR part of build_config

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This parameter was used in one file; it is used in several files since https://github.com/openhwgroup/cva6/pull/2395 We  should: - Add an `unsigned int OperandsPerInstr` field to [cva6_cfg_t](https://github.com/openhwgroup/cva6/blob/master/core/include/config_pkg.sv#L351) (but **not** [cva6_user_cfg_t](https://github.com/openhwgroup/cva6/blob/master/core/include/config_pkg.sv#L201)) -...