Andrew Brown

What about NaNs? I'm still trying to think this through and it still is very hazy, but would a new type guaranteeing that a float isn't a NaN be possible?...

I think the closure for this should be documentation in an "implementation guide."

@alexcrichton, @yurydelendik: I haven't read this too closely but from the subgroup meeting I think this is forward and may affect https://github.com/bytecodealliance/wasm-tools.

@dtig, we captured in the notes that there are some uses of 8x16 shifts in vp8 code. Looking at https://github.com/webmproject/libvpx, I see some uses of 8x16 shifts in the ARM...

> what you are recommending here is to get rid of the 8x16 shift, and document an accepted code pattern for applications that use these shifts I don't think I...

@arunetm mentioned that it might be a good idea to get a sense from the community how 8x16 shift instructions would be used. For context, I'm creating a poll within...

To circle back to the "performance cliff" argument, here are some measurements: I created x86 assembly code for the v8 implementation of [`i8x16.shl`][8x16 emulated] (an 11 instruction lowering) and, having...

@zeux, thanks for the alternate codegen sequences. The point you make about constant shift amounts sounds intuitively right to me: I see a lot of code like `a

@zeux, thanks for the detailed reply and apologies for the delayed response: > we assume the code section is largely cached in L2/L3, you're only looking at an L1 miss...

> I think it's incorrect to assume that 10-instruction code sequence is predictably bad I understand what your point about cache latency but my comparison for "bad" was against an...