Arjan Bink

@glaserf A pull request has been made to guard all of the PULP extensions (including the DSP multipliers), see https://github.com/openhwgroup/cv32e40p/pull/398. The reasons for not implementing finer grained control on CV32E40P...

Hi @mmatzev Of the three issues you report the first one you state is self-made, the second one relates to the fpnew repos (so not to the cv32e40p repos), and...

Hi @wallento Is there a way we can merge your pull request and also have the possibility to keep the old way of working for 1-2 weeks so that we...

Hi @kangoojim Thank you for reporting this issue. Please be aware that PMP is not included in the CV32E40P (even though the RTL file itself is present). We will of...

Hi @kangoojim Yes, when this core was still called RI5CY the PMP was supported, so it makes sense that you can use it if you are on an older commit....

Hi @mmatzev Thank you for the detailed report. If you have a fix for the tracer issue please feel free to issue a pull request

Implementation for this will need tot take into account the out of order completion of instructions, see #466

Hi @klion717 Yes, the NMI has been removed a couple of months ago as it was a proprietary feature and (very likely) not compliant to the forthcoming official RISC-V spec...

Hi @klion717 There is no way to limit the RTL to only issue AHB compatible transactions (other than modifying the RTL in the load-store unit itself). The recommended way is...

Hi @accuminium, your understanding is correct. There are no plans for CV32E40P to add a similar extension for floating-point loads and stores. (I would assume though (but did not try...