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Fusesoc and Linter

Open wallento opened this issue 5 years ago • 8 comments

This adds support for FuseSoC. As example, it fixes the verilator model to directly use it. But even more interesting, it adds a github action that automatically runs the linter on each push and pull request. When the linter fails, the action fails and a PR can be polished. As a caveat, there are 421 Linter warnings on the codebase at the moment. I have added a waiver file that suppresses them, but I suggest to fix the issues or replace the placeholder comments with an explanation. Happy to help, but too many for a "quick PR".

wallento avatar Jun 16 '20 12:06 wallento

Here is an example for the annotations: https://github.com/wallento/riscv/actions/runs/137172924 At an PR it will put them right to the code changes.

wallento avatar Jun 16 '20 12:06 wallento

From #367:

Thanks for getting the ball rolling on this @wallento. I've added a few minor comments, and have three big ones:

1. A lot of the "tb" dirs/files in this repo are slated to be removed to encoruage people to use [core-v-verif](https://github.com/openhwgroup/core-v-verif) testbenches, so we'll need to replicate some of this there.

2. tb/verilator-model/Makefile has a complete manifest embedded within it.  This is exactly what we are trying to displace.

3. Many (all?) of the RTL port map and parameter changes you suggest have been (or are being) taken care of elsewhere.

The minor things are to resolve warnings with recent GCCs.

About 2, you are right. I kept it in there for reference. If you are happy I would replace it with Makefile.fusesoc in that same folder. It does the same job. I would suggest, but didn't want to be too drastic :) About 3, you are right, seems it slipped in there and relates to #350 that I fixed while doing it. Will look into it and amend. Thanks!

wallento avatar Jun 16 '20 12:06 wallento

Hi @MikeOpenHWGroup, I have ameneded the PR. The changes of 3 are necessary to make the verilator-model run again. I believe long term it would be more useful to have a more sophisticated verilator-model as Quick Start vs. this rather simple bench and the full blown verification flow. I would be happy to contribute this as I am pretty fluent in it. I will also add a CI test to it, if you want. I have remove the original Makefile, this change pretty much shows the power FuseSoC :) Best, Stefan

wallento avatar Jun 16 '20 18:06 wallento

I can't really understand what Github feels about that Makefile to be a conflict, seems pretty straight-forward to me..

wallento avatar Jun 16 '20 18:06 wallento

Ah, I see! There was a massive rename between my first PR and now :) I will amend again after rebase!

wallento avatar Jun 16 '20 18:06 wallento

PR is guaranteed to be broken with this merge https://github.com/openhwgroup/cv32e40p/pull/360. I believe a rebase is in order.

bluewww avatar Jun 16 '20 21:06 bluewww

Rebased and amended to match the changed naming

wallento avatar Jun 17 '20 08:06 wallento

Hi @wallento Is there a way we can merge your pull request and also have the possibility to keep the old way of working for 1-2 weeks so that we do not immediately block many people just in case there are initial problems? How about core-v-verif, that would need to be updated as well, right?

Silabs-ArjanB avatar Jul 21 '20 05:07 Silabs-ArjanB