CoralieAllioux
CoralieAllioux
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description We are currently porting the verification to be compliant...
This PR is related to the one done on core-v-verif with the same subject: https://github.com/openhwgroup/core-v-verif/pull/2366 Since the definition of the function `read_section_sv` has been updated in core-v-verif, its import needs...
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description We are currently porting the verification to be compliant...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Support additional simulator: Cadence xcelium. The support concerns uvm...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Integration of data scratchpad into the cva6 core. It...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Integration of instruction scratchpad into the cva6 core. It...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Integration of a dedicated bus to program external peripherals....
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description We are currently porting the verification to be compliant...
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description We are currently porting the verification to be compliant...
This PR aims at resolving task https://github.com/openhwgroup/cva6/issues/1447 Here's the PMP block which contains all the features that are specific to PMP (data and instruction). Then, the PMPs embedded in unified...