Ondrej Ille
Ondrej Ille
Hi @RTimothyEdwards, thanks for quick reply and explanation of the situation. I think for now this is may be a showstopper for us since it is a lot of work...
@nickg , now the MR is ready from my side. Testing on larger design showed my foolishness in the code which reallocs the chains. I fixed it in little hackish...
``` I'm not opposed to adding SDF in general, but I do think it would be better if it did something useful. E.g. ModelSim has a -sdf option to set...
This reminded me a perfect article I read about SDF sign-off gate sims: http://www.deepchip.com/items/0569-02.html
Its rather uncommon to do gate sims in FPGA devices. If something does not work, you simply generate new bit-stream. Commercially, I have seen it only in Aero-space design that...
OK, I will keep that in mind. @Avelure do you know where I could find the VITAL models of Microsemi / Microchip FPGA cells? I have tried to install latest...
Perfect, thanks, that is exactly what I was looking for.
Hi, I am trying to rethink how to implement this, and I come no an interesting limitation. Since branch, expression and toggle coverage encode multiple "bins" in single coverage item,...
``` I think we really need to reconsider whether include-mems for toggle coverage is useful. At the time we didn't see any other tools supporting this and it doesn't make...
Hi, it always depends on what you are intending to cover. Sometimes, it is desirable to target every item for the given hierarchy. If you have single entity instantiated multiple...