Rachit Nigam

The warning here could also state that the module should probably expose a `ready` signal to tell the context that it will accept values in a particular cycle. This kind...

Another approach is using `forall` (😭 ): ``` exists #p. #p \in [0, K] /\ -- (1) ( #p != 0) \/ -- (2) (forall #i. #i >= 0 /\...

Subsumes #46

Much like #85, this is not strictly required for Filament's type soundness guarantees. The type soundness guarantee only holds if all the ports are linearly assigned. However, I think it...

Probably worth reading the documentation on [Amaranth HDL's approach to structs](https://whitequark.github.io/amaranth/docs/rfc-1-doc/stdlib/data.html)

One way to enable this is when the delay of a bundle (#97) is large enough and all values are disjoint, the values can be multiplexed onto the same wire.

The [cocotb-base harness][cocotb] exists in [this file][utils] and is invokes from a [fud stage][fud] when we run the `fud e ... --to cocotb-out` command. The data file is passes in...

FuseSoC provides a way to [call generators](https://fusesoc.readthedocs.io/en/stable/user/build_system/generators.html). This is not quite want we want since it refers to a static configuration. We should ideally be able to compile a Filament...

The [DefinitelyTyped](https://github.com/DefinitelyTyped/DefinitelyTyped) repository from the TypeScript ecosystem is a good example of a "shims" package manager. The idea is that someone else is in-charge of actually implementing the Verilog (JavaScript...

I've realized that this termination check is orthogonal to Filament's guarantees; while it would be nice to have this check, it is not necessary for Filament's correctness statement. We can...