Rachit Nigam

So, I thought our AXI tests already do (2) since the AXI wrapper generator needs to pass in memories by reference

Okay, here is an actionable approach to this: 1. By default, the Calyx compiler will always emit the fully "externalized" version of the top-level component. 2. We have another tool,...

Awesome, I support getting rid of all of this cruft (`@external` and `--synthesis`)! We should decide if we want to make it a part of this release or not because...

Argh that's odd! The logic for checking is here and we can change it to not check the `priority` key: https://github.com/calyxir/calyx/blob/main/fud/fud/stages/__init__.py#L218 However, it's kind of weird that we use the...

Yeah, looks like [our harness for running things on the FPGA](https://github.com/cucapra/calyx/blob/master/fud/fud/xclrun.py#L93) also does not use the `timeout` argument but the `kernel.xml` file is generated to expect it? Not sure if...

Thanks for confirming @sgpthomas! @zzy666666zzy we'll try to remove this extra argument in an upcoming PR.

It can in fact be an option in our AXI generator from https://github.com/cucapra/calyx/issues/1603

Thanks for adding the information @xerpi!

I think this is the dissertation that describes the flow (I think): https://upcommons.upc.edu/bitstream/handle/2117/390390/176860.pdf?sequence=2

Oh interesting! Did you ever use the native compiler to perform any optimizations to the design? I wonder how the resulting designs would differ.