Greg Chadwick

This is possible, but awkward. Further work required to make this easy and document. Two aspects to address: 1. Manual runs, run binary with specified UVM test 2. Regression runs,...

> Region override: This one is only possible when we are in NA4 mode in PMP Why is this the case? A smaller region inside a larger region should result...

The nits mentioned by @rswarbrick are still there so this is still live.

Thanks for the contribution @phthinh. I believe we will be keen to merge some form of this but as you can imagine new ISA extensions require careful consideration. There's quite...

I think this is partially to minimise the number of parameters fed out to top-level. Those that are there generally get fed into multiple different places. For the ICache however...

It's acceptable for our icache to not be coherent so I'd wouldn't class this as an RTL bug, more a documentation issue. Though we probably shouldn't be overwriting code in...

Removed from DV project as this is not DV related

@ctopal @marnovandermaas @hcallahan-lowrisc FYI. I don't think we need to worry about this for now, but a future enhancement we should consider later.

It would require adding any RV64I instructions that RV32I doesn't have to produce a fully compliant RV64I implementation Note that this has the potential to be a highly disruptive change...

Closing this as it was only relevant to prior project tracking.