Vadim Kaushan
Vadim Kaushan
RP2040 starts execution on both cores. If entry function contains a "special" definition of `static mut` variable, each core takes a mutable reference to it, which is illegal from the...
As `svd-parser` only performs parsing, it's better to make an additional pass after it. * Replacing empty descriptions (https://github.com/rust-embedded/svd2rust/pull/369#issuecomment-519923151) * `enumeratedValues` shouldn't contain items with identical names or values (https://github.com/japaric/svd/pull/69#issuecomment-515784823)...
PDF format makes it easier to open schematics.
V1.1 hardware has `T_VCC_EN` signal that controls 3.3V target power (and should be handled carefully), V1.2 hardware also has `T_ENABLE` signal to control 5V line.
These buffers should support cache operations to synchronize caches with the main memory.
* [ ] T_VCC should be measured (via T_VCC_MEAS) before enabling 3.3V target power. * [ ] 5V line should be read (via PROT_5V_SENSE) before enabling 5V target power.
One of the solutions is to handle USB (and probably USART) interrupts and then move to the RTIC execution model.
* [ ] Baud rate handling on the USB side * [ ] UART driver (USART2) * [ ] Automatic baud rate detection?
https://github.com/rust-embedded-community/async-on-embedded/blob/47eb470ec53fd88035faa5360c0167f3987304c8/async-embedded/src/executor.rs#L203-L207 This code checks for a value of the `VECTACTIVE` field (only for bits 7..0 of the 9-bit field). This value corresponds to the current interrupt number handled (0 for...