Zachary Snow

As mentioned in https://github.com/zachjs/sv2v/issues/307#issuecomment-2677097208, I'm very curious if something like Yosys could help to further simplify your Verilog. Please let me know what you find! sv2v was originally built to...

Thanks for filing this issue! Are you looking to have these enum attributes for debugging, or do they result in some behavioral difference downstream?

It's not obvious to me what's wrong with this output. For example, this isn't the same "technically illegal" pattern discussed in #298. This is another case where I wonder if...

Indeed dynamic arrays are neither synthesizable nor easily converted into Verilog. Are you using sv2v as part of synthesis flow, or something else? One possibility: If this code is in...

Is there an existing standard flag name for this behavior in other tools? The feature seems doable, but I'm not sure if it should be a separate argument (e.g., `--pkgdir`)...

`$clog2` was added to Verilog in IEEE 1364-2005, released nearly 19 years in April 2006. There's certainly no reason to support it in some constant expressions but not others. Would...

@alexforencich Did you have any luck with the `$clog2` substitute above?

Thank you for filing this issue! These constant functions within generate blocks are a useful conversion trick for sv2v. It may be possible to avoid them, but for most purposes,...

Thank you for filing this issue! sv2v absolutely supports struct conversions, including the struct patterns demonstrated here. I would greatly appreciate it if you could narrow down the scale of...

@tarik-ibrahimovic Thank you for sharing this example! There are a couple issues I spotted in the example (pasted below). Note that these issues aren't specific to sv2v; commercial tools complain...