Andrew Young

If we bump llvm to include https://github.com/llvm/llvm-project/pull/96329 we get a new error: ``` ******************** TEST 'CIRCT :: Conversion/LLHDToLLVM/convert_signals.mlir' FAILED ******************** Exit Code: 2 Command Output (stderr): -- RUN: at line...

```mlir firrtl.circuit "MovableNodeShouldDominate" { firrtl.module @MovableNodeShouldDominate(in %clock: !firrtl.clock) { %child_clock = firrtl.instance child @Child(in clock: !firrtl.clock) firrtl.connect %child_clock, %clock : !firrtl.clock %ui1 = firrtl.constant 1 : !firrtl.uint %0 = firrtl.asAsyncReset...

Given this firrtl IR: ```firrtl FIRRTL version 4.0.0 circuit Top: %[[ {"class": "circt.test", "target": "~Top|Foo>w"} ]] layer A, bind: public module Top: inst foo of Foo inst bar of Bar...