Winston Zhang

> I removed the ready to merge label temporarily until the intel/llvm side is updated and passing tests. Please readd it when intel/llvm PR is updated. > I removed the...

> This could be related to [intel/llvm#16747 (comment)](https://github.com/intel/llvm/pull/16747#issuecomment-2652441043) which I think should have been resolved by #2690 but will need to investigate further. Sounds good, please let me know. Thanks.

@pbalcer It should compile now, working out some of the e2e tests that are still failing.

@pbalcer getting different results on llvm/sycl test-e2e. Also confirmed locally on a PVC machine. The following tests were passing on my machine: - SYCL :: DiscardEvents/discard_events_mixed_calls.cpp - SYCL :: ESIMD/BitonicSortKv2.cpp...

> lgtm once all tests are green and the benchmarks are passing. > > Just curious, why not base this PR on #1600? 1600 still have some tests that are...

> > ^None of the tests that URT CI claims to be failing are failing on llvm/sycl CI > > They don't have a PVC system in CI. Other PRs...

@pbalcer Seems like the e2e L0 tests are getting stuck. Could you please check that? I've also tried to run the the e2e tests locally, and they all seem to...