instruction-set-architecture topic
Opcodes
Database of CPU Opcodes
customasm
💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/
xcrypto
XCrypto: a cryptographic ISE for RISC-V
Assembly-MIPS-Instruction-Set
Assembly program with the MIPS instruction set
umesimd
UME::SIMD A library for explicit simd vectorization.
Basic-SIMD-Processor-Verilog-Tutorial
Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clo...
RISC-CPU
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
scarv-cpu
SCARV: a side-channel hardened RISC-V platform
hf-risc
HF-RISC SoC
mano-simulator
🖥️ An assembler and hardware simulator for the Mano Basic Computer, a 16 bit computer.