alveo topic

Vitis In-Depth Tutorials

Xilinx

Vitis_Accel_Examples

Xilinx

VNx: Vitis Network Examples

Xilinx

Dataflow QNN inference accelerator examples on FPGAs

Xilinx

Introductory examples for using PYNQ with Alveo

Xilinx

Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.

MakarenaLabs

Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ

Xilinx

PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.

ECASLab