TCal
There seems to be a conflict at CSR 0xBC0: https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/cpu/vexriscv/csr-defs.h#L6 https://github.com/SpinalHDL/VexRiscv/blob/master/src/main/scala/vexriscv/plugin/CfuPlugin.scala#L103 I have brought this to the attention of the VexRiscv maintainer.
In Verilator simulation of `mnv2_first`, the hang is corrected if I change the address of the interrupt mask CSR from 0xBC0 to 0xBC8 in all locations https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/cpu/vexriscv/csr-defs.h#L6 https://github.com/SpinalHDL/VexRiscv/blob/master/src/main/scala/vexriscv/plugin/ExternalInterruptArrayPlugin.scala#L7 https://github.com/litex-hub/pythondata-cpu-vexriscv/blob/master/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala#L228 ......
Some considerations from the VexRiscv maintainer about changing the interrupt mask CSR address: > It may also require to change the linux driver, i can see here https://github.com/litex-hub/pythondata-cpu-vexriscv/blob/master/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v#L55 Thing is,...
Hi @bala122 , sorry for the delay; I'll try to take a closer look soon.
@bala122 , can you provide the following information: * which CPU variant you're using (or if it's one you created yourself, what is the configuration? ICache size etc) * which...
@bala122 , I **DO** have those warnings from Vivado. The first time the test sequence is executed, 91 cycles elapse (presumably due to I-cache misses). For each subsequent time, 12...
Hi @bala122 , thank for posting your findings here, we really appreciate it. I had a couple of comments in case you suspect I-cache misses again in the future: *...
I gave this a quick try (on gLinux), and it worked for me, with one difference -- I didn't run `install_oxide` and I have nothing under `third_party/usr/local`. I'll run `install_oxide`...
Hmm, even after doing `install_oxide`, it still works for me. I do need to hit ENTER to get the menu, but then it runs. To exit, hit ESC, then type...