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dmaengine: axi-dmac: check cache coherency register

9

Marking the DMA as cache coherent (dma-coherent in devicetree) is only safe with versions of axi_dmac that have this feature enabled. Related to https://github.com/analogdevicesinc/hdl/pull/925. Example devicetree using the dma-coherent property:...

Rebased v0.3 branch onto master and fixed a few python2-to-python3 details. Doctests and examples seem to work with python 3 now. Any objections to merging this and bumping to v0.3?...

GNU Radio 3.8 support?

2

Looks like gr-ccsds is not compatible with GNU Radio 3.8. There's a guide and a few recommendations on branching strategy etc. at: https://wiki.gnuradio.org/index.php/GNU_Radio_3.8_OOT_Module_Porting_Guide

Timer: Remember last timer setting

6

Remember last duration used in Timer app. Reset to zero with long press on start button. Fixes https://github.com/InfiniTimeOrg/InfiniTime/issues/1991 Tested in InfiniSim and on hardware, seems to work as desired: ...

Allow overriding RAM style in FIFO

2

Allows the user to guide the synthesis tool when choosing memory type in `axis_fifo`. Without guidance, Vivado will gladly use all available BRAM instead of targeting URAM in UltraScale FPGAs....

Fix offset in scrambling sequence

2

The PLFRAME should be scrambled by the PL scrambling sequence, starting with the first non-header symbol. This offset is captured by `start_ix` (with the value 90), but is both used...

Single-unit height bins slightly broken

10

Setting the height of a bin to one 7mm unit produces an unfortunate overhang on the bottom, making prints require support and not stack nicely. This is `gridfinity-rebuilt-bins.scad` with `gridz=2`...