Syeda Rafia Fizza Naveed

illegal instruction trap at vlm.v instr

5

Hi, I'm facing some problems with the vadd instruction. For example, when I run the test for vadd (specifically, vadd.vv_mf8_rm0_int64_0_0_vl4, which means fractional lmul=1/8, sew=64, and vlen=4) on Spike, it...

Adding Vivado Support in FlooNoC

2

I'm adding support for Vivado in FlooNoC, but after compilation, during the elaboration step, a segmentation fault error is being shown. However, a specific error indicating the cause of the...