neorv32-riscof
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✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
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Bumps [neorv32](https://github.com/stnolting/neorv32) from `9eb7ece` to `1981b40`. Commits 1981b40 Add COE and MEM file generator options (#904) eb7ad79 [docs] SW: add mem and coe makefile targets 0e7d784 [sw] add coe and...
dependencies
hi, it is more like an information for you than a real pull request. Thanks to GHDL with GCC backend, we can compute coverage. You can see in the diff...