Jiuyang Liu
Jiuyang Liu
This one is a rewrite based on my own understanding to rocket-chip `AsyncQueue` architecture. I think the original micro-arch is from: http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO1.pdf http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO2.pdf
I think before we land a CDC and SVA in FIRRTL, I have no idea on how to test this(and so did in RC). I think the road map can...
> you could try to write some concrete unittests that ensure basic functionality. Yes I'm going to do it this week to do some basic functionality verification. > Chiseltest seems...
I'd like to continue working on this. The main issue is how to verify this? Maybe @ekiwi can provide some idea, will his formal infra support multi clock domain?
If directly cast to `UInt`, if might have negative influence to circuit PPA, since no mask is used, while actually there is `mask` for `MuxOH`, and we cannot ignore it....
This is an algorithm problem, if you have multiple encodings, for example, s0 -> 010, s1 -> 110, s2 -> 001. How do you cover one(some) of them with minimal...
My further question to this is: how to design the encoding API? 1H API implicitly contains an assertion: `PopCount === 1.U`. And how do we resolve this general encoding(ECC, 8b/10b,...
@carlosedp would you mind adding some test to demonstrate the usage?
This seems contains a breaking change? There should be a deprecation flow.
Seems currently this PR is a draft PR @carlosedp? Sorry I merged master into this(I thought it's done) For that breaking change, I think you can don't touch the original...