seandextercrevinn

Xcelium generated Makefile needs top level module after defparam option

4

Steps to recreate: - Follow steps on https://github.com/lowRISC/ibex/tree/master/examples/simple_system to set up tools necessary to simulate the Ibex simple system example (i.e. Prerequisites section). - Build the software test "hello_test" to...

Trying to change read interface to AXI4, getting elaboration errors when generating verilog

2

Steps to recreate: 1. Have dependencies installed (sbt, jdk, scala), clone fastvdma repo, and navigate to the cloned repo directory. 2. Make the following edits: File: src/main/scala/DMAController/DMATop.scala Line 36: ```...