rmsyn

> How do you feel about that? I don't have a VF1 to test on, but I can try to use the JH7110 code on the VisionFive1 board. One thing...

> I have a VF1, and the DRAM init for it is a standalone C implementation that I took and translated as well back then; that's the code in oreboot....

> yea... for reference, here is the code for the JH7100 that I translated back then - you will see the close similarity Sure, and it will take adding those...

> For upcoming PRs, please do us the favor to squash the fixups into the respective corresponding commits that are to be fixed up, so that browing the git history...

> Have you considered an ARM chromebook Definitely, I had one at one point, and wouldn't mind getting one again for this project. The stuff I'm working on now is...

I have basically abandoned efforts on Chromebook support. If you are working on porting oreboot to an `x86_64` Chromebook, you'll need to resurrect the EDK support for initial board bring-up....

I traced a call into `cbmem` for `google/octopus` mainboard, so maybe just block out the debug calls that trace back to `cbmem` for now? It looks like `cbmem` is also...

> Could you elaborate on the question or what you are trying to do? I'm working on support for the `google/octopus/bobba` mainboard (CB311-9H), and came across the `cbmem` stuff while...

Update: I was able to connect using `openocd` with the following during startup (or pausing at `u-boot` console over UART): ``` $ openocd -f ./openocd-usb.cfg -c "transport select jtag" -f...

> I am not sure what kind of probe the Sipeed debugger is exactly. Looks like all the Chinese ST-Link v2 but seemingly isn't. Supported JTAG probes are JLink, CMSIS-DAP...