Robert Chen
Robert Chen
The SYCL PR https://github.com/LLNL/RAJA/pull/1081 was tried on RZHASGPU (Intel CPU + Nvidia GPU) and has some linking/compilation problems: - Dpcpp build error using the `dpcpp.cuda.sh` script. The clang compiler installed...
# Summary - This PR is a refactoring, and bugfix - It does the following: - Refactors the ability to turn off the experimental vectorization API, and its tests, with...
Something like `RAJA_ENABLE_VECTORIZATION` to CMake for turning this off for non-vector builds.
Now that we require C++14, we should probably update the code to reflect the niceties which come with it. Please add items to this list of code that we can...
Strange OpenMP linking error with the next set of default compilers on BlueOS (clang/16.0.6, cuda/11.20, gcc/8.3.1). Will ping Gyllenhaal about this, but maybe @trws has seen this before? I've tried...
# Summary - This PR is an update of the SYCL interface and compiler - It does the following: - Allows usage of an updated SYCL compiler on Corona (https://github.com/LLNL/RAJA/issues/1255)...
Marbl is having an issue building with `-DRAJA_ENABLE_VECTORIZATION=On` on x86-Cuda with clang, using RAJA v2022.10.5. Reported by William Hawkins. The following clang+nvcc flags fail to build: `-march=core-avx2` `-march=native` With this...
This occurs in the existing `test-kernel-tile-Dynamic2D-Sequential` test: ``` [chen59@rzansel3:tile-variants]$ gdb ../../../test-kernel-tile-Dynamic2D-Sequential.exe [==========] Running 36 tests from 36 test suites. [7/1298] [----------] Global test environment set-up. [----------] 1 test from Sequential/KernelTileDynamic2DTest/0,...
VectorRegister implementations of `load_packed` and `load_packed_n` are only loading the first value of the array. Surprisingly, the `=` operator works as expected, and performs the load and store properly. The...
@MrBurmark says that once we move to C++17, the cub and rocprim TPLs are no longer necessary. This is just a reminder to do that.